The present invention relates to a semiconductor device, and particularly to an integrated circuit device of a metal-oxide-semiconductor type (called hereinafter as an "MOSIC") provided with an input and/or output protective circuit.
An MOSIC is provided with an input and/or output protective circuit which protects MOS transistor(s) connected to each input or output terminal from the destruction caused by the discharge of static electrical charges. The protective circuit usually comprises a resistive element having one end connected to the input or output terminal and a semiconductor region formed in a semiconductor substrate to form a PN junction therebetween. The semiconductor region is connected to the other end of the resistive element and further connected to the transistor to be protected. The static electrical charges are thereby discharged toward the substrate through the resistive element and the PN junction, thereby protecting the transistor connected to the input or output terminal.
When the MOSIC is in use, the input or output terminal is often supplied with a noise voltage which sometimes has such a polarity that forward biases the PN junction formed between the semiconductor region and the substrate. In that case, electrons or holes are injected into the substrate, with the result that they function as a trigger current for turning ON the parasitic thyristor formed in a complementary MOSIC to cause the so-called "latch-up phenomenon". More specifically, in the complementary MOSIC, a well region of one conductivity type is formed in the substrate of the other conductivity type, and source and drain regions of the other conductivity type are provided in the well region to form a MOS transistor. The semiconductor region of the protective circuit is formed in the substrate to have the one conductivity type, that is, the same conductivity type as the well region. Therefore, the parasitic thyristor is constituted by n-p-n-p or p-n-p-n structure of the semiconductor region of the protective circuit, the substrate, the well region and the source or drain region formed in the well region. The electrons or holes caused by the noise voltage supplied to the input or output terminal may thus trigger the parasitic thyristor to cause the latch-up phenomenon.
Even if the MOSIC is not of the complementary type, the aforementioned electrons or holes bring about an undesirable effect upon the MOSIC. For example, where a DRAM (Dynamic Random Access Memory device) is formed as an MOSIC, the injected electrons or holes often destroy data stored in memory cells. More specifically, the memory cells of the so-called "one-transistor" type are employed in the DRAM in order to enhance the memory capacity without increasing the cost. The one-transistor memory cell consists of one MOS transistor and a storage capacitor. The MOS transistor operates as a transfer gate, and the storage capacitor holds the data as electrical charges therein. The source region of the MOS transistor is also used as one of electrodes of the storage capacitor, and therefore the storage capacitor is equivalently coupled to tbe semiconductor substrate. The electrons or holes injected into the substrate due to the noise voltage may reach the storage capacitor so that the electrical charges in the storage capacitor may be changed to cause the destruction of the data stored in the memory cell.